74373 Octal D-Type Latch with 3-Output State IC

The 74373 is an Octal D-Type Transparent Latch featuring 3-state outputs, making it ideal for temporary data storage, data buffering, and bus interfacing in digital systems. It consists of eight D-type latches with a latch enable (LE) input and an output enable (OE) input. When the latch enable is HIGH, the outputs follow the input data; when LOW, the data is latched and held stable. The output enable input allows the outputs to be placed in a high-impedance state for bus control and data sharing applications.

The 74373 IC is built using TTL (Transistor-Transistor Logic) technology, providing high-speed switching, excellent noise immunity, and compatibility with other TTL devices. Housed in a 20-pin Dual Inline Package (DIP), it is easy to use on both breadboards and printed circuit boards.

Features:

• 8-bit (octal) D-type transparent latch
• 3-state (tri-state) outputs for bus-oriented applications
• Latch enable (LE) allows transparent or latched data operation
• Output enable (OE) provides high-impedance control for shared buses
• TTL logic compatible and high-speed performance
• Capable of driving significant load currents
• Ideal for buffering and temporary data storage
• Standard 20-pin DIP package for easy handling and soldering
• Low static power consumption and reliable operation

Functional Description:

• When LE (Latch Enable) is HIGH, the outputs reflect the D input levels (transparent mode).
• When LE transitions LOW, the last data present on the D inputs is stored (latched mode).
• When OE (Output Enable) is HIGH, outputs are in the high-impedance (Hi-Z) state, allowing for bus sharing without interference.
• When OE is LOW, the latched or transparent data appears at the outputs.

Applications:

• Microprocessor and microcontroller data buffering
• Bus interfacing and data latching
• Temporary data storage
• Memory address latching
• Input/output port latching
• Peripheral data holding circuits
• Digital system timing and synchronization

Specifications:

• Type: Octal D-type latch with tri-state outputs
• Logic Family: TTL
• Supply Voltage (VCC): 4.75V to 5.25V
• Input High Voltage (VIH): ≥ 2V
• Input Low Voltage (VIL): ≤ 0.8V
• Output Current (IOL/IOH): ±8 mA
• Propagation Delay (typical): 20 ns
• Operating Temperature Range: 0°C to +70°C
• Package Type: 20-pin DIP

Note: Images are for illustration purposes only.